1. Field of the Invention
The invention relates to a semiconductor device, in particular, a semiconductor device in which a current flows in a thickness direction of a semiconductor substrate.
2. Description of the Related Art
A trench type MOS transistor is known as a semiconductor device in which a current flows in a thickness direction of a semiconductor substrate, for example. This type of MOS transistor will be described referring to a cross-sectional view of FIG. 9, hereafter.
An N−-type epitaxial layer 111 is formed on the front surface of an N-type semiconductor substrate 110. A P-type diffusion layer 112 which serves as a channel of a MOS transistor is formed on the front surface of this epitaxial layer 111. A plurality of trenches 113 having a predetermined depth is formed in the P-type diffusion layer 112 from the front surface to the back surface, and gate electrodes 114 are formed in these trenches 113. The gate electrodes 114 are covered by gate insulation films 115 on the front side of the P-type diffusion layer 112 and in the trenches 113. Source layers 116 made of N-type diffusion layers are formed adjacent to the gate electrodes 114 with the gate insulation films 115 being interposed therebetween. A P-type body layer 117 is formed between two adjacent source layers 116.
A source electrode 118 connected to the source layers 116 is formed on the front surface of the P-type diffusion layer 112. The surface of the semiconductor substrate 110 on the side where the epitaxial layer 111 is not formed is covered by a drain electrode 119.
In the MOS transistor having this structure, when a predetermined voltage is applied to the gate electrodes 114, a channel is formed in the P-type diffusion layer 112 along the trenches 113. A drift current flows through this channel in the thickness direction of the semiconductor substrate 110, that is, to the epitaxial layer 111, the semiconductor substrate 110 and the drain electrode 119.
The trench type MOS transistor is described in the Japanese Patent Application publication No. 2001-119023, for example.
The described MOS transistor has limitations in reducing on-resistance and realizing higher current flow due to a limitation in the density of the trenches 113 and the gate electrodes 114, that is, the number of the trenches 113 and the gate electrodes 114 per unit area.